Friday, April 20, 2007

ALUA definition

5.8.2 Asymmetric logical unit access
5.8.2.1 Introduction to asymmetric logical unit access

Asymmetric logical unit access occurs when the access characteristics of one port may differ from those of another
port. SCSI target devices with target ports implemented in separate physical units may need to designate differing
levels of access for the target ports associated with each logical unit. While commands and task management
functions (see SAM-3) may be routed to a logical unit through any target port, the performance may not be optimal,
and the allowable command set may be less complete than when the same commands and task management
functions are routed through a different target port. When a failure on the path to one target port is detected, the
SCSI target device may perform automatic internal reconfiguration to make a logical unit accessible from a different
set of target ports or may be instructed by the application client to make a logical unit accessible from a different set
of target ports.

A target port characteristic called target port asymmetric access state (see 5.8.2.4) defines properties of a target
port and the allowable command set for a logical unit when commands and task management functions are routed
through the target port maintaining that state.

A target port group is defined as a set of target ports that are in the same target port asymmetric access state at all
times. A target port group asymmetric access state is defined as the target port asymmetric access state common
to the set of target ports in a target port group. The grouping of target ports is vendor specific.

A logical unit may have commands and task management functions routed through multiple target port groups.
Logical units support asymmetric logical unit access if different target port groups may be in different target port
group asymmetric access states.

An example of asymmetric logical unit access is a SCSI controller device with two separated controllers where all
target ports on one controller are in the same asymmetric access state with respect to a logical unit and are
members of the same target port group. Target ports on the other controller are members of another target port
group. The behavior of each target port group may be different with respect to a logical unit, but all members of a
single target port group are always in the same target port asymmetric access state with respect to a logical unit.

1 comment:

Chip said...

Why have you posted a large exceprt from SPC3?

http://t10.org/ftp/t10/drafts/spc3/spc3r23.pdf